1. Field
Aspects of the present invention relate to an organic light emitting display and to a pixel of an organic light emitting display.
2. Description of the Related Art
Recently, various flat panel displays (FPDs) with reduced weight and volume in comparison to cathode ray tube (CRT) have been developed. The FPDs include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), and organic light emitting displays.
Among the FPDs, the organic light emitting displays display images using organic light emitting diodes (OLEDs) that generate light by re-combination of electrons and holes. The organic light emitting display has fast response speed and is driven with low power consumption.
FIG. 1 is a circuit diagram illustrating a pixel of an organic light emitting display of the related art.
Referring to FIG. 1, a pixel 4 of the organic light emitting display includes an organic light emitting diode OLED and a pixel circuit 2 coupled to a data line Dm and a scan line Sn to control the OLED.
The anode electrode of the OLED is coupled to the pixel circuit 2, and the cathode electrode of the OLED is coupled to a second power source ELVSS. The OLED emits light with brightness corresponding to the current supplied from the pixel circuit 2.
The pixel circuit 2 controls the amount of current supplied to the OLED to correspond to a data signal supplied to the data line Dm when a scan signal is supplied to the scan line Sn. Here, the pixel circuit 2 includes a second transistor M2 coupled between a first power source ELVDD and the OLED, a first transistor M1 coupled to the second transistor T2, the data line Dm, and the scan line Sn, and a storage capacitor Cst coupled between the gate electrode and the first electrode of the second transistor T2.
The gate electrode of the first transistor T1 for performing operations as a switching element is coupled to the scan line Sn, and the first electrode of the first transistor T1 is coupled to the data line Dm. The second electrode of the first transistor T1 is coupled to one terminal of the storage capacitor Cst. Here, the first electrode is set as one of a source electrode and a drain electrode, and the second electrode is set as an electrode different from the first electrode. For example, when the first electrode is the source electrode, the second electrode is the drain electrode.
The first transistor T1 coupled to the scan line Sn and the data line Dm is turned on when the scan signal is supplied from the scan line Sn to supply the data signal supplied from the data line Dm to the storage capacitor Cst. At this time, the storage capacitor Cst stores the voltage corresponding to the data signal.
The gate electrode of the second transistor T2 for performing an operation as a driving element is coupled to one end of the storage capacitor Cst, and the first electrode of the second transistor T2 is coupled to the other terminal of the storage capacitor Cst and the first power source ELVDD. The second electrode of the second transistor T2 is coupled to the anode electrode of the OLED. The second transistor T2 controls the amount of current that flows from the first power source ELVDD to the second power source ELVSS via the OLED to correspond to the value of the voltage stored in the storage capacitor Cst. At this time, the OLED emits light corresponding to the amount of current supplied from the second transistor M2.
In the above-described pixel structure of the related art, the threshold voltage and electron mobility of the second transistor T2 as the driving element vary with each of the pixels 4 due to process deviation. Deviation in the threshold voltage and electron mobility of the second transistor T2 causes the pixels 4 to emit light with different gray levels with respect to the same gray level voltage, hence an image with uniform brightness cannot be displayed.
In order to solve the above problem, various pixel circuits for compensating for the threshold voltage of the second transistor T2 are suggested.
In addition, recently, in order to realize a FPD with high picture quality and high resolution, high frequency driving (for example, 120 Hz) tends to be performed. However, in this case, scan time, e.g., one horizontal period (1H), is reduced in comparison with conventional frequency driving (for example, 60 Hz). As the one horizontal period (1H) is reduced, the threshold voltage compensating time of the second transistor that is the driving element is reduced.
That is, in the related art, in the high resolution and high frequency driving that is the tendency of the FPD, sufficient threshold voltage compensation time may not be secured so that picture quality deteriorates.